This workshop teaches the design flow for back-end processing of a Multi-Voltage (MV) design using Synopsys’ Eclypse Low-Power Flow.  In the workshop you will floorplan, place, route, synthesize clocks, and verify a 65nm design with shutdown requirements. 

The course concentrates on Multi-Voltage design techniques available in IC Compiler and PrimeRail.  Power reduction techniques that are not specifically MV or those covered in basic courses are not discussed in the lectures.  Most such techniques are used in the labs and are discussed in the presentation Appendices.

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