PrimeTime 1

OVERVIEW

This workshop will show you how to maximize your productivity when using PrimeTime. You will learn how to identify the opportunities to improve run time, prepare for STA on your design and master the skills required to investigate and gain familiarity with the clocks that will largely dictate your STA results.

This workshop will spend almost an entire day in training you how to use the critical report_timing command, so you can quickly identify and debug almost any timing problem. You will also learn how to set up useful procedures, variables and aliases and find help quickly. At the end of the workshop, you will know how to use a straightforward and simple methodology to create and execute error-free run scripts. Finally, there will be a long discussion on using the various analysis modes in PrimeTime, and you will learn why On Chip Variation is the default mode for PrimeTime now.

The workshop focuses on the SDF based flow, but also covers issues related to using parasitics; however the lab exercises use only SDF.

Hands on labs follow each training module, allowing the user to apply the skills learned in lecture.

OBJECTIVES

At the end of this workshop the student should be able to:

• Interpret the essential details in a timing report for setup and hold, recovery and removal, and clock gating setup and hold
• Generate timing reports for specific paths and with specific details
• Generate summary reports of the design violations organized by clock, slack or by timing check
• Create, execute and debug a PrimeTime run script
• Identify opportunities to improve run time
• Create a saved session and subsequently restore the saved session
• Identify the clocks, where they are defined, and which ones interact, on an unfamiliar desig
• Prepare for performing STA on a design and then use this knowledge to respond to, focus and debug your timing analysis

AUDIENCE PROFILE

Design or verification engineers who perform STA using PrimeTime.

PREREQUISITES

To benefit the most from the material presented in this workshop, students should have:

• A basic understanding of digital IC design
• Familiarity with UNIX workstations running X-windows
• Familiarity with vi, emacs, or other UNIX text editors

COURSE OUTLINE

Day 1:

• Does your design meet timing?
• Objects, Attributes, Collections
• Constraints in a timing report
• Timing arcs in a timing report
• Control which paths are reported
  

• Summary Reports
• Create a setup file and run script
• Validate a run script
• Getting to know your clocks
  

• Analysis types and back annotation
• Additional checks and constraints
• Conclusion

SYNOPSYS TOOLS USED

• PrimeTime 2007.06

JOB AID